ADATA - DDR2 - module - 2 GB - DIMM 240-pin - 800 MHz / PC2-6400 - CL5 - 1.8 V - unbuffered - non-ECC

ADATA - DDR2 - module - 2 GB - DIMM 240-pin - 800 MHz / PC2-6400 - CL5 - 1.8 V - unbuffered - non-ECC

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Key Features and Benefits:

  • 4-bit prefetch
    DDR2 achieves the high-speed by four times the transmission amount of data. It also doubles the data rate of DDR. In the 4-bit prefetch architecture, read or write can achieve the four times the amount of data in a really internal bus clock. This is why the DDR2 can operate in four times faster than the internal operation frequency.
  • ODT (On Die Termination)
    In DDR2, it is composed the termination resistor inside which is applied to match the transmission impedance on the main board. It will greatly attenuate the reflected noise resulted from last signals which improves a clear logic-level to avoid the reception of error data.
  • OCD (Off Chip Driver) calibration
    OCD is the input/output driver resistance which applied to adjust the cross-voltage to equalize the pull-up and pull-down signal. It will greatly help to the noise-rejected quality from DDR2 module to chipset in main board.
  • Posted CAS and Additive Latency (AL)
    In a posted CAS (Column Address Strobe) operation, a CAS signal (read/write command) can be input to the next clock after RAS (Row Address Strobe) signal (active command) input. The CAS command is held by the module side and executed after the additive latency. It is easier controller design by avoiding collision on the command bus, and improves the command and data bus efficiency due to simple command order. It also improves the practical memory bandwidth by removing the bubble.
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